Interleaved 모듈라 곱셈 기반의 고속 RSA 암호 칩의 설계
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조현숙,
10.13089/JKIISC.2000.10.1.89, Full Text:
Keywords: RSA, Public-key, interleaved, Barrett, modular exponentiation, hardware, VHDL
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Cite this article
[IEEE Style]
조현숙, "The design on a high speed RSA crypto chip based on interleaved modular multiplication," Journal of The Korea Institute of Information Security and Cryptology, vol. 10, no. 1, pp. 89-98, 2000. DOI: 10.13089/JKIISC.2000.10.1.89.
[ACM Style]
조현숙. 2000. The design on a high speed RSA crypto chip based on interleaved modular multiplication. Journal of The Korea Institute of Information Security and Cryptology, 10, 1, (2000), 89-98. DOI: 10.13089/JKIISC.2000.10.1.89.