하드웨어 공유와 캐리 보존 덧셈을 이용한 MDS 해쉬 프로세서의 설계
Vol. 13, No. 4, pp. 139-150,
8월.
2003
10.13089/JKIISC.2003.13.4.139, Full Text:
Keywords: Hash Algorithm, MD5, SHA-1, HAS-160, 1Psec, Multimedia security, Cryptographic Processor
Abstract Statistics
Cite this article
10.13089/JKIISC.2003.13.4.139, Full Text:
Keywords: Hash Algorithm, MD5, SHA-1, HAS-160, 1Psec, Multimedia security, Cryptographic Processor
Abstract Statistics
Cite this article
[IEEE Style]
최병윤 and 박영수, "Design of MD5 Hash Processor with Hardware Sharing and Carry Save Addition Scheme," Journal of The Korea Institute of Information Security and Cryptology, vol. 13, no. 4, pp. 139-150, 2003. DOI: 10.13089/JKIISC.2003.13.4.139.
[ACM Style]
최병윤 and 박영수. 2003. Design of MD5 Hash Processor with Hardware Sharing and Carry Save Addition Scheme. Journal of The Korea Institute of Information Security and Cryptology, 13, 4, (2003), 139-150. DOI: 10.13089/JKIISC.2003.13.4.139.