유한체 상에서 고속 연산을 위한 직렬 곱셈기의 병렬화 구조
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조용석,
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Keywords: Finite fields, Multiplier, Error-control coding, cryptography
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Cite this article
[IEEE Style]
Y. Cho, "Parallelized Architecture of Serial Finite Field Multipliers for Fast Computation," Journal of The Korea Institute of Information Security and Cryptology, vol. 17, no. 1, pp. 33-40, 2007. DOI: 10.13089/JKIISC.2007.17.1.33.
[ACM Style]
Yong-Suk Cho. 2007. Parallelized Architecture of Serial Finite Field Multipliers for Fast Computation. Journal of The Korea Institute of Information Security and Cryptology, 17, 1, (2007), 33-40. DOI: 10.13089/JKIISC.2007.17.1.33.