8-bit ATmega128 프로세서 환경에 최적화된 이진체 감산 알고리즘
Vol. 25, No. 2, pp. 241-252,
4월.
2015
10.13089/JKIISC.2015.25.2.241,
Full Text:
Keywords: ATmega128 processor, Fast reduction, Efficient Implementation
Abstract Statistics
Cite this article
![](https://d2kjln74dkk4oj.cloudfront.net/img/doi_icon.png)
![](https://d2kjln74dkk4oj.cloudfront.net/img/pdficon_small.png)
Keywords: ATmega128 processor, Fast reduction, Efficient Implementation
Abstract Statistics
Cite this article
[IEEE Style]
D. Park, H. Kwon, S. Hong, "Optimized Binary Field Reduction Algorithm on 8-bit ATmega128 Processor," Journal of The Korea Institute of Information Security and Cryptology, vol. 25, no. 2, pp. 241-252, 2015. DOI: 10.13089/JKIISC.2015.25.2.241.
[ACM Style]
Dong-Won Park, Heetaek Kwon, and Seokhie Hong. 2015. Optimized Binary Field Reduction Algorithm on 8-bit ATmega128 Processor. Journal of The Korea Institute of Information Security and Cryptology, 25, 2, (2015), 241-252. DOI: 10.13089/JKIISC.2015.25.2.241.